Instructions: Language of the Computer
50 questions available
Questions
What is the vocabulary of commands understood by a given computer architecture called?
View answer and explanationAccording to the design principle 'Simplicity favors regularity', a RISC-V arithmetic instruction like 'add a, b, c' must always have exactly how many variable operands?
View answer and explanationWhat is the total number of general-purpose registers available in the RISC-V architecture?
View answer and explanationIn the RISC-V architecture, what is the primary purpose of data transfer instructions?
View answer and explanationGiven that RISC-V uses byte addressing and an array A consists of 64-bit doublewords, what immediate offset must be used in a load instruction to access the element A[8] from the base address of A?
View answer and explanationWhat is the term for the process where a compiler places less frequently used variables into memory to free up registers?
View answer and explanationWhat is the primary advantage of having immediate instructions like 'addi' in an instruction set?
View answer and explanationIn the RISC-V instruction set, what specific decimal value is register x0 always hard-wired to?
View answer and explanationWhat is the standard convention for representing signed binary numbers in all modern computers, as described in the text?
View answer and explanationIn a 64-bit two's complement system, what is the decimal value of the binary number represented by 64 ones (1111...1111two)?
View answer and explanationWhat is the function of the 'sign extension' feature of a signed load instruction, such as 'lb' (load byte)?
View answer and explanationTo distinguish it from symbolic assembly language, what is the numeric (binary) version of instructions called?
View answer and explanationIn keeping with the design principle that 'simplicity favors regularity', all RISC-V instructions are how many bits long?
View answer and explanationIn the RISC-V R-type instruction format, what is the function of the field named 'rd'?
View answer and explanationWhat is the primary reason for having different instruction formats, such as R-type and I-type, in the RISC-V architecture?
View answer and explanationWhich two key principles form the basis of the stored-program concept?
View answer and explanationWhich logical operation is described as a bit-by-bit operation that leaves a 1 in the result only if both bits of the operands are 1?
View answer and explanationIf register x19 contains the binary value corresponding to decimal 9 (0...00001001), what is the decimal value in register x11 after executing the instruction 'slli x11, x19, 4'?
View answer and explanationWhat is the function of the RISC-V instruction 'beq rs1, rs2, L1'?
View answer and explanationWhat is a 'basic block' in the context of program compilation?
View answer and explanationIn the standard RISC-V software convention for procedure calls, which register is allocated to hold the return address?
View answer and explanationAccording to the RISC-V software convention for procedure calling, how many registers are allocated for passing parameters?
View answer and explanationWhat is the name of the data structure, organized as a last-in-first-out queue, that is considered ideal for spilling registers?
View answer and explanationIn the RISC-V calling convention, what is the key difference in responsibility between a caller and a callee regarding saved registers (e.g., x8-x9) and temporary registers (e.g., x5-x7)?
View answer and explanationWhat is the name for the segment of the stack that contains a procedure's saved registers and local variables?
View answer and explanationIn the RISC-V memory allocation convention shown for a Linux operating system, how are the stack and heap segments arranged to allow for efficient use of memory?
View answer and explanationIn the ASCII representation of characters, by what exact decimal value do the codes for corresponding uppercase and lowercase letters differ?
View answer and explanationWhich RISC-V addressing mode is being used when the operand is a constant contained within the instruction itself?
View answer and explanationIn PC-relative addressing, the branch address is calculated as the sum of the program counter (PC) and which other value?
View answer and explanationTo implement synchronization primitives like locks in a multiprocessor system, what is the critical capability that the hardware must provide?
View answer and explanationIn RISC-V, the pair of instructions 'lr.d' (load-reserved doubleword) and 'sc.d' (store-conditional doubleword) are used to build atomic operations. When does the 'sc.d' instruction fail?
View answer and explanationWhat is the primary function of a linker in the program translation process?
View answer and explanationIn the context of RISC-V assembly, what is a pseudoinstruction?
View answer and explanationAccording to the translation hierarchy for C, what is the direct output of the compiler?
View answer and explanationWhat is a major difference in operand handling between the Java Virtual Machine (JVM) and the RISC-V architecture?
View answer and explanationWhat is the primary function of a Just In Time (JIT) compiler in a Java environment?
View answer and explanationWhen compiling the C 'for' loop 'for (i = 0; i < n; i += 1)', the loop test condition must be translated into a conditional branch. If 'i' is in register x19 and 'n' is in register x22, which RISC-V instruction correctly implements the exit condition to branch to 'exit1' if 'i >= n'?
View answer and explanationIn the pointer version of the 'clear' procedure, the C code 'p = p + 1' is translated to the RISC-V instruction 'addi x5, x5, 8'. Why is the immediate value 8 used instead of 1?
View answer and explanationAn R-type instruction is represented by the following decimal values for its fields: opcode=51, funct7=0, funct3=0, rs1=20, rs2=21, rd=9. Which register is specified as the destination for the result of the operation?
View answer and explanationThe RISC-V I-type instruction format uses a 12-bit immediate field for constants. What is the range of signed decimal integers that can be represented by this 12-bit field?
View answer and explanationWhat is a major architectural difference between x86 and RISC-V regarding operands for arithmetic and logical instructions?
View answer and explanationThe RISC-V 'jalr' (jump-and-link register) instruction is versatile. Besides its primary use for returning from a procedure, what other programming language construct does it help implement?
View answer and explanationIn the 'leaf_example' procedure from Section 2.8, the code saves three registers on the stack. Since each register is a 64-bit doubleword, how many bytes are subtracted from the stack pointer 'sp' to make room for them?
View answer and explanationWhich fundamental hardware design principle best explains why the RISC-V architecture has a limited number of 32 registers instead of many more?
View answer and explanationIn floating-point arithmetic, what is the term for the exceptional event that occurs when a negative exponent becomes too large to fit in the exponent field, causing a non-zero fraction to become too small to be represented?
View answer and explanationWhat bias value is used for the exponent in the IEEE 754 standard for single-precision floating-point numbers?
View answer and explanationWhat does the special IEEE 754 floating-point symbol 'NaN' stand for, and what is its purpose?
View answer and explanationWhich of the following is described in the text as the 'only complete and reliable measure of computer performance'?
View answer and explanationThe RISC-V instruction 'sub x11, x10, x9' is an R-type instruction. Its opcode is 0110011, its funct3 is 000, and its funct7 is 0100000. Which of these fields specifically distinguishes it from the 'add' instruction, which has the same opcode and funct3?
View answer and explanationWhy does the 'jal' (jump-and-link) instruction use a large 20-bit address field, allowing it to jump farther than the 12-bit field in conditional branches like 'beq'?
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